Inkjet-based wafer planarization: the microscopic solution to a huge chip problem

On the whole, we are all guilty of focusing on the big picture. Every technological leap (and there have been many recently) finds its way into our feeds and watercooler chats. But they don’t happen out of the blue and this is something we know a lot about. Because our quiet engine of pioneering scientists is busy solving problems most people have no idea exist but could radically change the course of technology.

Would you believe, we’ve been in the business of building and selling the machines which manufacture the brains of our electronics for over half a century? So, we know a thing or two about semiconductor chips. Recently, we brought the world closer to resolving a huge – but tiny – problem: how do we simplify the production of the powerful computer chips we need for the Artificial Intelligence age?

And they must become more powerful to cope with the level of processing our world is increasingly needing. If you have a basic knowledge of computer chips, then you’ll know that this is a nod to the infamous ‘Moore’s Law’ that states “the number of transistors on a microchip doubles roughly every two years, while computing costs decrease.” And though it’s debatable whether this still holds, the fact remains that something needed to change to increase the power of a chip without affecting the size, cost or speed to manufacture. To address this, our scientists have designed a world first. A technology that is, frankly, such a gamechanger and so complex, that it needs a bit of explaining.

A tiny, bumpy city

Today, when semiconductor chips are made, it’s done using one of two different kinds of process – either photolithography, which is the traditional method, using light to kind of carve incredibly intricate electrical circuits onto a silicon wafer. Or nanoimprint lithography, an emerging Canon technology which precision ‘stamps’ the circuit pattern (think of it a bit like a minuscule waffle maker!). And here’s where the problems begin.

Chips have become more powerful by packing in literally billions of tiny transistors, which, as you might imagine, can be a bit of a crush, making its surface uneven. This is a big problem because, on a mind-bogglingly tiny chip, even the most microscopic bump can have the same effect as a huge pothole on a road. So, when the next layer of circuits needs to be printed above it, everything can become frustratingly wobbly.

Because modern chips can have dozens of these layers stacked on top of each other, this has so far been tackled using techniques like ‘spin coating’ (adding a liquid that forms a film across the surface and spinning it to spread it thinly and evenly) and chemical mechanical polishing (repeatedly smoothing the wafer before adding the next layer). However, as all the elements which make up a chip – transistors, switches and copper wire pathways – become smaller, these just aren’t precise enough anymore.

Solving the problem through inkjet expertise

Yes, you read that correctly – inkjet. Unsurprisingly, we have an incredible level of knowledge in this area, and, in its simplest form, we have expertly adapted the same kind of tech that beautifully fires ink onto paper to perfectly filling in the surface of a chip. Here’s how it works:

Scan: First a kind of map of the surface of the silicon wafer is made, scoping out its ups and downs with absolute precision.

Jetting & Fill: Then, using Canon’s proprietary inkjet nozzles, the machine works out exactly how much of a special liquid is needed to fill the low areas – the microscopic ‘potholes’, if you will.

Press: Finally, a flat plate is pressed down over the liquid, so the gaps are completely filled. It’s then turned into a solid resin using UV light.

When the plate is lifted, the surface is perfectly flat. Actually, that description simply doesn’t do justice to the level of flatness that this technology – inkjet-based adaptive planarization – achieves. The maximum the surface can vary in height is under 5 nanometres. When you know that a strand of human hair is about 80,000 to 100,000 nanometres wide, that’s phenomenally smooth.

But, yes, nanometres aren’t perhaps the easiest unit to visualise, so let’s put this another way. Take the smoothest surface you can think of, perhaps your phone screen, and imagine it is ten miles wide, so you could walk across it. What you’d discover is that it is actually filled with hills and valleys as high as houses and as deep as rivers (to get a sense of this in reality, we’d need an extremely powerful microscope). Now, if we came along with this new technology, filling in the valleys, then smoothing it all out with a giant plate, the biggest bump you’d encounter would be as thin as a credit card.

Flat, stacked and frontier forward

In removing the bumps to this extraordinary degree, our scientists have made a breakthrough that lets chipmakers stack layers of circuits on top of each other, higher and higher, creating architectures that are more three dimensional than ever, without getting any wider, so they continue to fit in the tech we know and love. And this smooths the way to doing so faster and more economically too.

So, while the big picture making the headlines is: ultra powerful processors for the AI, phones and supercomputers of tomorrow, none of this could exist without a world where we pay microscopic attention to the details. We believe in continually examining our expertise and finding ways to use it in solving the hidden problems behind the world’s most complex infrastructures. And as a result, we are often the quiet power behind some of the most advanced technology you will use every single day.

In fact, you might even say we’re smoothing the path to the future.